Innovative teaching professional with 3+ years of progressive experience in teaching (Engineering aspirants) various subjects. Developed and implemented programs to encourage student participation. Offered required help for the students to out perform in their academic curriculum. Hone skills in lecturing, rendering knowledge about technical concepts and ideas and molding young aspirants.
Pearson Education Services Pvt Ltd, May 2011 till date, Content Developer- SME
? Assigned the tasks of writing original content for different Subjects.
? Handled the responsibilities of reviewing and editing articles to ensure quality of articles.
? Developed high quality content for e-learning courses.
? Gathering information and content material regarding the subject topic.
? Planning and preparing the overall articles as per the format.
BMS Institute of Technology, Bangalore, Aug 2006 to July 2007, Lecturer
? Network Analysis: simple networks, network theorems, network (mesh and node) analysis, network topology, graph theory, two port transfer functions, impedance transforms.
? Power Electronics: Simple SCR circuit, power semiconductor devices, bridge rectifiers, operation of diode with purely R load, RL load, clippers, choppers, clampers, Converter Control of DC Machines.
? Basic Electronics: Circuit elements and quantities Kirchoff’s Voltage Law (KVL), Kirchoff’s Current Law (KCL), current/voltage divider circuit, digital logic, NMOS and PMOS transistors.
Practical- Power Electronics, Computer Communication Networks.
SJC Institute of Technology, Bangalore, Aug 2004 to July 2006, Lecturer
? Antenna and wave propagation: Antenna parameters, transmission formulas, sources of radiation, power patterns, array of point sources, loop antenna, helical antenna, electric dipole and thin linear antenna, Broadband and frequency independent antennas, Reflector antennas and feed systems, Antenna for special applications
? Computer Communication Network: Purpose of computer networks, types of computer network, basic hardware components, Internet protocol, network architecture, OSI layer, sliding window protocol, routing algorithms, packet format, token ring, Random access protocols (ALOHA), Queuing theory.
? Digital Integrated Circuits: Integrated circuits, classification, IC device technology, the devices (the diode, the MOSFET), designing sequential logic circuits, designing arithmetic building blocks, designing memory and array structures, Synchronous Design.
? VLSI: Fabrication of MOSFET’s, VLSI design flow, design hierarchy, concepts of regularity, modularity and locality, FPGA, Gate Array, design for testability.
Practical- Power Electronics, Electronic circuits, MATLAB, PSPICE
• External Examiner, CCN Lab.
Extreme vigil ensured while handling the lab, accurate outputs measured, on the basis of received outputs grades awarded.
• Internal Examiner, CCN Lab, Power Electronics Lab.
Measuring & rectifying the received outputs, precise explanation for the given outputs enquired, assisting the external examiner in awarding grades.
? Preparing weekly Activity Report on theory classes and Monthly Progress Report on
practical classes and Performance report on each student
? Guided students in related projects and checking for precise output.
1. PC Based Reliability Test System, BPL - Operation of a VCD player can be controlled through a remote. To perform an operation corresponding row & column in remote is made high. This row & column is connected to a relay, controlled by the switching action of the transistor.
2. The Memory for BDMA Transfer of ADSP-2181, Indian Institute of Science (IISc) – All ADSP-2100 family processor that have internal program memory RAM support boot loading. With boot loading, the processor reads instruction from a byte wide external memory device (EPROM) over the memory interfaces and stores the instructions in the 24-bit wide program memory.
Paper titled: “Design of low voltage CMOS OPAMP” in national conference.
Held at: “Recent Advancements in Engineering and Technology” at Dr.TTIT, KGF.
MTECH ACADEMIC PROJECT (In progress):
Project Work : Design of 2-stage CMOS OP-AMP with improved CMRR & PSRR and
Team Size : 1
Duration : 6 months
Software Used : Hspice, Tanner tool
This project presents a basic 2- stage CMOS op-amp design procedure on how to arrive at an actual design using hand calculations. A CMOS op-amp that has a CMRR, a PSRR & gain above 100db for each of these parameters is proposed to be designed.
Indian Society for Technical Education (ISTE) - Life Time Member
COURSE COLLEGE UNIVERSITY YEAR OF PASSING AGGREGATE
Bachelor of Engineering (ELECTRONICS & COMMUNICATION) SJCIT VTU JUNE 2004 63%
Master of Technology
(VLSI & EMBEDDED SYSTEM DESIGN) NMIT VTU JUNE 2011
I SEM 62%
II SEM 60.8%
III SEM 72%
IV SEM Result
? Testing Tools (Black Box Testing)
? Windows, MS OFFICE, C
? Tanner Tool v13.0, HSPICE
Date of birth : 28th April 1982
Gender : Female
Marital status: Married